The present invention relates generally to circuits and methods for establishing upper limits to the amount of current flowing through a pass transistor or pass element in a circuit such as a linear voltage regulator, an output stage of an amplifier, or the like.
Providing robust circuitry for accurately limiting or clamping the current through the pass transistor of a linear regulator is important in many applications. There are many applications in which it is necessary to impose an accurate, PVT-independent (i.e., process, voltage, and temperature-independent) upper limit on the amount of current flowing through the pass transistor or pass element of a linear regulator or to control the slew rate of output stage transistors of an operational amplifier. Such applications may require system-wide reliability and safety, especially in cases in which external cables or external components are connected to an integrated circuit linear voltage regulator or operational amplifier.
FIG. 1 indicates the prior art in the context of a common regulator 10-1 including a pass transistor or pass element represented by a pass element circuit wherein a pass transistor has one terminal which receives a current IMAIN from a power source. The pass transistor together with an OTA (operational transconductance amplifier) and an external current setting resistor form a linear regulator that produces a constant reference current IREF. The reference current is used for limiting, i.e., clamping, a large current IMAIN flowing through the pass transistor. In safety-critical applications it is very important that IMAIN be limited to a desired maximum value in the event of a malfunction which otherwise could cause IMAIN to be large enough to cause damage.
More specifically, switch SW1 in FIG. 1 is a MOS pass transistor that is part of a pass element circuit 15 of a regulator 10-1. Pass transistor SW1 regulates flow of IMAIN from power source 13 through conductor 11A so as to maintain a predetermined voltage across a load 21. Pass element circuit 15 is controlled in response to the current IREF produced by a linear regulator 18-1 so as to establish an upper limit to the value of regulated current IMAIN. Linear regulator 18-1 includes OTA (operational transconductance amplifier) 14, which has its (+) input coupled to a reference voltage VREF and its (−) input coupled by conductor 16 to the junction between one terminal of a current setting resistor RSET and one terminal of a current limiting resistor RLIMIT, the other terminal of which is connected to the source of a N-channel MOS pass transistor T1. The other terminal of current setting resistor RSET is connected to ground. The output 19 of OTA 14 is connected to the gate of pass transistor T1. The drain of pass transistor T1 is connected by conductor 12 to a control input of pass element circuit 15. The constant reference current IREF generated by linear regulator 18-1 flows into the control input 12 of pass element circuit 15. Linear regulator 18-1 thus performs a voltage-to-current conversion, converting VREF to IREF. Pass element circuit 15 operates to compare a predetermined scaled multiple of IREF with IMAIN and accordingly controls the gate voltage of MOS pass transistor SW1 so as to prevent IMAIN from exceeding a desired maximum value in the event of a malfunction (such as an accidental short-circuiting of current setting resistor RSET). Stated differently, linear regulator 18-1 controls reference current IREF so as to cause MOS pass transistor SW1 to “clamp” IMAIN so it never exceeds the desired maximum value and thereby protects linear regulator 18-1, pass element circuit 15, and load 21 from damage.
As subsequently explained in more detail with reference to FIG. 4, pass element circuit 15 operates to compare IMAIN to a scaled representation of IREF. (Pass element circuit 15 in effect multiplies IREF by the scaling factor (e.g., by 40,000) before making the comparison.) The result of that comparison is used to control the gate voltage of MOS pass transistor SW1. Then, if IREF×40,000 is less than IMAIN, that means IMAIN is too great, so linear regulator 18-1, in effect, reduces the magnitude of the gate voltage of MOS pass transistor SW1 to prevent IMAIN from increasing further. However, if is IREF×40,000 is greater than IMAIN, then linear regulator 18-1 causes pass element circuit 15 to turn on MOS pass transistor SW1 as hard as possible.
Linear regulator 18-1 of Prior Art FIG. 1 operates to limit the current IREF through its pass transistor TI either by making transistor T1 small enough that it is incapable of sourcing too much current or by “choking” pass transistor T1 by coupling current limiting resistor current RLIMIT between the source of pass transistor T1 and one terminal of current setting resistor RSET.
Unfortunately, neither of these techniques provides a precise current limit for IREF because the properties of transistor T1 and a current limiting resistor RLIMIT vary considerably with respect to variations in integrated circuit manufacturing process parameters, voltage values, and temperature. Also, reducing the current driving capability of pass transistor T1 (by either by making its channel-width-to-channel-length ratio small or by including RLIMIT) reduces the loop gain of the regulation feedback loop including OTA 14, pass transistor T1, and RLIMIT, and therefore reduces the accuracy of the reference current IREF. Adding current limiting resistor RLIMIT also reduces the effect of transconductance of the pass element T1 and therefore also affects the loop gain, and therefore the accuracy, of the regulator circuit 18-1.
Thus, there is an unmet need for an improved circuit and method for increasing the accuracy of a maximum value of a reference current flowing through a pass transistor or amplifier output transistor.
There also is an unmet need for an improved circuit and method for increasing the accuracy of a maximum value of a reference current flowing through a pass transistor without using a current limiting resistor.
There also is an unmet need for an improved circuit and method for increasing the accuracy of a maximum value of a reference current flowing through a pass transistor without reducing the current conducting capability of a pass transistor.
There also is an unmet need for an improved circuit and method for increasing the accuracy of a maximum value of a reference current flowing through an amplifier output transistor without using a current limiting resistor in series with the source electrode of the pass transistor.